/*********************************************************************
*               (c) SEGGER Microcontroller GmbH & Co. KG             *
*                        The Embedded Experts                        *
*                           www.segger.com                           *
**********************************************************************

-------------------------- END-OF-HEADER -----------------------------

File    : NXP_iMX6DQ_Core3.JLinkScript
Purpose : J-Link script file to debug core 1 on the NXP i.MX6DQ
Literature:
  [1]  J-Link User Guide

Notes:
  (1) ...

Additional information:
  For more information about public functions that can be implemented in order to customize J-Link actions, please refer to [1]
*/

/*********************************************************************
*
*       ResetTarget
*/
void ResetTarget(void) {
  //
  // In case cores 1-3 are reset, we do nothing.
  // As we would lose connection to these cores,
  // when resetting the device because reset disables cores 1-3 and only leaves core0 alive
  //
}

/*********************************************************************
*
*       ConfigTargetSettings()
*
*  Function description
*    Called before InitTarget(). Maninly used to set some global DLL variables to customize the normal connect procedure.
*    For ARM CoreSight devices this may be specifying the base address of some CoreSight components (ETM, ...)
*    that cannot be automatically detected by J-Link due to erroneous ROM tables etc.
*    May also be used to specify the device name in case debugger does not pass it to the DLL.
*
*  Notes
*    (1) May not, under absolutely NO circumstances, call any API functions that perform target communication.
*    (2) Should only set some global DLL variables
*/
void ConfigTargetSettings(void) {
  JLINK_CPU = CORTEX_A9;                                                                 // For a complete list of known CPU constants, please refer to UM08001 (J-Link User Guide)
  //
  // Configure base address of debug registers so J-Link knows to which core it shall connect
  // On the i.MX6DQ all cores are accessible via a single APB-AP but their debug registers are located at different addresses
  // Addresses taken from DAP memory map in TRM of i.MX6D
  //   0x02150000 CPU0 Debug i/f
  //   0x02152000 CPU1 Debug i/f
  //   0x02154000 CPU2 Debug i/f
  //   0x02156000 CPU3 Debug i/f
  //
  // Highest bit of address can be set to 1 without affecting the functionality of J-Link, as DAP memory is aliased there
  //
  CORESIGHT_CoreBaseAddr = 0x02156000;
  JLINK_CORESIGHT_AddAP(0, CORESIGHT_AHB_AP);                                            // AHB-AP to System Bus
  JLINK_CORESIGHT_AddAP(1, CORESIGHT_APB_AP);                                            // APB-AP to access Cortex-A9 cores
  JLINK_CORESIGHT_IndexAPBAPToUse = 1;                                                   // Cortex-A/R: AP-Index of APB-AP to use for communication with core
//  JLINK_CORESIGHT_IndexAHBAPToUse = 0;                                                 // Cortex-M: AP-Index of AHB-AP to use for communication with core. Cortex-A/R: AP-Index of AHB-AP that can be used for SEGGER RTT
}