J-Link Pro V8

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This page contains the mechanical and electrical specifications of the SEGGER J-Link Pro V8.
For information on the general specifications as well as an overview of supported software features refer to J-Link Pro.

Specifications

General
Supported OS Microsoft Windows (x86/x64), Linux (x86/x64/Arm), macOS (x86/Apple Silicon)
Electromagnetic compatibility (EMC) EN 55032, EN 55035
Operating temperature +5 °C ... +60 °C
Storage temperature -20 °C ... +65 °C
Relative humidity (non-condensing) Max. 90% rH
Mechanical
Size (without cables) 100 mm x 53 mm x 27 mm
Weight (without cables) 73 g
Available Interfaces
Ethernet interface 100 MBit/s
USB interface USB 2.0 (hi-speed); USB-C
Target interface JTAG/SWD 20-pin
JTAG/SWD Interface, Electrical
Target interface voltage (VIF) 1.2 V ... 5 V
Current drawn from target voltage sense pin (VTRef) < 25 µA
Target supply voltage 5 V (derived from USB voltage)
Target supply current Max. 300 mA
Reset type Open drain with 100 Ohms series resistor. Can be pulled low or tristated
Reset low level output voltage VOL <= 10% of VIF
For the whole target voltage range (1.2 V <= VIF <= 5 V)
LOW level input voltage (VIL) VIL <= 40% of VIF
HIGH level input voltage (VIH) VIH >= 60% of VIF
For 1.2 V >= VIF <= 3.6 V
LOW level output voltage (VOL) with a load of 10 kOhm VOL <= 20% of VIF
HIGH level output voltage (VOH) with a load of 10 kOhm VOH >= 80% of VIF
For 3.6 V <= VIF <= 5 V
LOW level output voltage (VOL) with a load of 10 kOhm VOL <= 20% of VIF
HIGH level output voltage (VOH) with a load of 10 kOhm VOH >= 80% of VIF
JTAG/SWD Interface, Timing
Target interface speed Max. 50 MHz
SWO sampling frequency Max. 100 MHz
Data input rise time (Trdi) Trdi <= 20 ns
Data input fall time (Tfdi) Tfdi <= 20 ns
Data output rise time (Trdo) Trdo <= 10 ns
Data output fall time (Tfdo) Tfdo <= 10 ns
Clock rise time (Trc) Trc <= 3 ns
Clock fall time (Tfc) Trc <= 3 ns
Analog power measurement interface
Sampling frequency 200 kHz
Resolution 50 uA

Interface speeds

Interface Max. speed
VCOM 10 MBd