NXP KW45

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The NXP KW45 are highly secure ARM M33 microcontrollers, supporting Bluetooth Low Energy 5.2 wireless communication. It contains of a Cortex-M33 and optionally an radio unit with an Cortex-M3.

Supported devices

Refer to the supported device list for a full list of all supported KW45 family devices, their corresponding names and connection diagrams.

Target interfaces

Interface J-Link support Flasher support
JTAG YES.png YES.png
SWD YES.png YES.png

Flash banks

Flash bank Base address J-Link support Flasher support Loader
Name Bank size
Internal flash 0x00000000 YES.png YES.png Default Up To 1024KB
Internal flash (Secure) 0x10000000 YES.png YES.png Default Up To 1024KB
NBU flash 0x48800000 YES.png YES.png Default 256KB


RAM

  • NXP KW45 devices have ECC RAM at 0x30000000. The first 16 KB of RAM (0x30000000 – 0x30004000) is reserved for ROM bootloader execution and some ROM API. J-Link initializes the the next 32KB of RAM (0x30004000 - 0x3000C000) during the initial connect to target. For more information, refer to the ECC article.

Watchdog handling

  • The device has a watchdog WDOG.
  • The watchdog is fed during flash programming.

Device specific handling

Reset

  • The device uses a device specific reset, which ensures that the device is halted on reset vector after the the ROM bootloader was executed. For further information please refer to J-Link Reset Strategies.

Attach

Attach is a debugging feature which exclusively applies to J-Link and J-Trace and does not apply to Flasher.

  • Attach is not supported by default because the J-Link initializes certain RAM regions by default.

Evaluation boards

Example application