Nordic Semiconductor nRF54H20
The Nordic Semiconductor nRF54H20 are ultra low-power multiprotocol wireless System-on-Chip (SoC) supporting Bluetooth Low Energy, Bluetooth mesh, Thread, and Matter technologies.
Flash Banks
SECURE core
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| MRAM | 0x0E003000 |  |
|
Default | 1988 KB |
| UICR APP core | 0x0FFF8000 | |
|
Default | 1976 B |
| BICR | 0x0FFF87B0 | |
|
Default | 80 B |
| UICR RADIO core | 0x0FFFA000 | |
|
Default | 72 B |
Flash programming is supported through SECURE core while in life cycle state EMPTY.
RADIO core
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| MRAM | 0x0E030000 | |
|
Default | 1856 KB |
| UICR APP core | 0x0FFF8000 | |
|
Default | 1976 B |
| UICR RADIO core | 0x0FFFA000 | |
|
Default | 72 B |
Flash programming is supported through RADIO core while in life cycle state RoT or DEPLOYED.
APP core
| Flash bank | Base address | J-Link support | Flasher support | Loader | |
|---|---|---|---|---|---|
| Name | Bank size | ||||
| MRAM | 0x0E030000 | |
|
Default | 1856 KB |
| UICR APP core | 0x0FFF8000 | |
|
Default | 1976 B |
| BICR | 0x0FFF87B0 | |
|
Default | 80 B |
| UICR RADIO core | 0x0FFFA000 | |
|
Default | 72 B |
Flash programming is supported through APP core while in life cycle state RoT or DEPLOYED.
Watchdog Handling
- The device has two watchdogs WDT010, WDT011.
- The watchdogs are fed during flash programming.
Multi-Core Support
Before proceeding with this article, please check out the generic article regarding Multi-Core debugging here.
Depending on the life cycle state (LCS) different cores are available.
| Core | LCS | J-Link Support |
|---|---|---|
| SECURE (Cortex-M33) | EMPTY |
|
| APP (Cortex-M33) | RoT/DEPLOYED |
|
| RADIO (Cortex-M33) | RoT/DEPLOYED after unlock through APP core |
|
| FLPR (RISC-V) | RoT/DEPLOYED after unlock through APP core |
|
| PPR (RISC-V) | RoT/DEPLOYED after unlock through APP core |
|
In below, the debug related multi-core behavior of the J-Link is described for each core:
SECURE core (Cortex-M33)
Init/Setup
- Enables debugging
- Initializes MPC so that MRAM is in readable state
- The core is only available after transitioning to LCS state EMPTY.
Reset
- No reset is performed.
APP core (Cortex-M33)
Init/Setup
- The core is only available after transitioning to LCS state RoT.
Reset
- Performs a reset via CTRL-AP
RADIO core (Cortex-M33)
Init/Setup
- The core is only available after transitioning to LCS state RoT.
- The core needs to be enabled by APP core application.
FLPR core (RISC-V)
Init/Setup
- The core is only available after transitioning to LCS state RoT.
- The core may be assigned to a domain (e.g. APP core domain, RADIO core domain) .
- By default, J-Link assumes that the core is assigned to the APP core domain (AP0).
PPR core (RISC-V)
Init/Setup
- The core is only available after transitioning to LCS state RoT.
- The core may be assigned to a domain (e.g. APP core domain, RADIO core domain) .
- By default, J-Link assumes that the core is assigned to the APP core domain (AP0).
STM tracing
The NRF54H20 includes a STM. It can be used for system tracing.
Minimum requirements
- J-Trace Pro V3 or later
- Trace pinout on board
- Target application that sends data via STM
- J-Link software V9.52 or later
- nRF54H20-DK eval board
- BICR must be programmed: https://nrfconnectdocs.nordicsemi.com/ncs/3.3.0/nrf/app_dev/device_guides/nrf54h/ug_nrf54h20_gs.html#bring-up-step-programming-the-bicr
- Nordic IronSide SE must be programmed
- Device in LCS RoT state or later
- Python V3.10 installed
- J-Link script with pin init: Nordic_nRF54H20_STMTrace.JLinkScript
Example setup
- Download the following example setup and unzip it: File:nRF54 STM ExampleSetup.zip
- Make sure your target application is already flashed which fulfills the requirements above.
- Open STM_Trace_TestClient.py and leave the launched window open
- Open a terminal from the unzipped folder
- Call the JLink.exe file with the following command line: -device Cortex-M33 -JLinkScriptFile .\nRF54_Connect.JLinkScript -if SWD -speed 4000 -CommandFile .\nRF54_Command.jlink
- On Linux or macOS systems replace the JLink.exe with the host specific executable for the J-Link Commander
- The raw STM data from the target device will now be stored in the STMData.bin file
- To stop the recording simply type q in the J-Link Commander and press enter
Capture with Nordic nrfutil
It is also possible to capture the stream with Nordics nrfutil tool.
Installation guides can be found here:
- https://docs.nordicsemi.com/bundle/nrfutil/page/guides/installing.html
- https://docs.nordicsemi.com/bundle/nrfutil/page/guides/installing_commands.html
The required command line call is: nrfutil trace stm --input-jtrace-serial-number <J-Trace serial number> --stdout ascii
Simply replace <J-Trace serial number> with your actual J-Trace Pro serial number.
If everything was set up correctly you should see the received STM printf data displayed in the terminal.
ETM tracing
The NRF54H20 includes a ETM on some of the Arm cores. It can be used for instruction tracing. We recomemnd to use our debug software Ozone when tracing.
Minimum requirements
- J-Trace Pro V3 or later (for on-chip tracing J-Link is sufficient)
- Trace pinout on board (for on-chip tracing JTAG interface is sufficient)
- J-Link software V9.52 or later
- nRF54H20-DK eval board
- BICR must be programmed: https://nrfconnectdocs.nordicsemi.com/ncs/3.3.0/nrf/app_dev/device_guides/nrf54h/ug_nrf54h20_gs.html#bring-up-step-programming-the-bicr
- Nordic IronSide SE must be programmed
- Device in LCS RoT state or later
Script files
The following J-Link script files are required for instruction tracing to work. Make sure to add them to your setup. How is explained here: https://kb.segger.com/J-Link_script_files#Using_J-Link_script_files
On-Chip tracing: Nordic_nrf54H20_APP_TraceBuffer.pex
Off-Chip tracing: Nordic_nrf54H20_APP_TracePins.pex